Design pathfinding PDKs

The NanoIC pilot line’s mission to accelerate beyond-2nm innovation relies heavily on the development and dissemination of pathfinding process design kits (PDKs).

These kits are crucial for both academic and industrial design communities to gain hands-on experience with advanced nodes. They enable designers to understand cutting-edge concepts like system-technology co-optimization (STCO), and novel features such as backside power delivery networks (BPSDN).

This early access allows designers, including those from fabless companies, to tackle complexities and explore new possibilities. It speeds up the adoption of beyond-2nm technologies and fosters innovation across the entire ecosystem.

N2 design pathfinding PDK

The first design pathfinding PDK (P-PDK) available through the NanoIC pilot line is based on the process assumptions of imec’s N2 technology node. It features gate-all-around (GAA) nanosheet devices and both frontside and backside power delivery networks (PDN).

The logic library is built around a six-track standard cell architecture, with devices containing a stack of four nanosheets.

Key ground rules include a gate pitch (CPP) of 48 nm and a minimum metal pitch (MP) of 22 nm. The backside PDN library features built-in power connections through nano-TSVs to the backside power rails.

The PDK contains:

• Digital standard cell libraries (100+ cells)
• GDSII layout
• Abstracted layout views
• Timing/power views
• Multi-VT
• Standard cell SPICE netlists
• PVT corners support
• Backside connectivity
• EDA technology files

Want access to the design pathfinding PDKs?

The NanoIC design pathfinding PDKs are available through Europractice, a consortium of research organizations that provides European industry and academia with resources to develop electronic circuits and systems.

You can download them free of charge upon signing the Design Kit License Agreement (DKLA).

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